Joe,

Thank you for your reply.

I am aware of Fixed Duty Cycle Mode (FDCM) and Pulse Frequency Mode (PFM) f=
or the NCO.  But what complicates things is that I would be using the NCO f=
or my tonal sweeps, ramping, say, from 500Hz to 1650Hz, and for that I woul=
d need a fixed duty cycle.  But "at the same time" (as those frequencies ar=
e constantly changing, to decrease the output volume would mean to cycle ea=
ch and every one of those pulses on/off like I mentioned before:

Normal (FULL VOLUME) Output pulse:

    --------------------
    |                  |
----|                  |----

Soft Chirp Output:

    -- -- -- -- -- -- --
    || || || || || || ||
----||-||-||-||-||-||-||----


Since the NCO cannot use FDCM & PFM at the same time, you can see that the =
single NCO of the 16F1508 could not be used to accomplish volume reduction =
(not that I can see anyway).

You mentioned the loss of bass and such when reducing volume this way, but =
that doesn't matter.  I have chips which use that "soft chirp" method, and =
to my ears the sound quality when reduced is more than acceptable.  Again, =
this project is for an alarm siren, not for high fidelity audio.

Any other ideas? =20
Configurable Logic Cell (CLC)?

Thanks,

James Wages



Thu, 28 Jul 2016 16:24:35 +1200, IVP <joecolquitt@clear.net.nz>:

    It seems to me that for normal operation you'd be in FDC mode and
    in PF mode for a quiet test. Flipping the NCOxCON,NxPFM bit looks
    like that would toggle between normal/test
   =20
    Joe


--=20
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