Hi all, I'm trying to get a grip on the dsPIC33 DMA system. I have two pdfs for it - 70292C (chip datasheet) and 70215B Part 38, DMA details http://ww1.microchip.com/downloads/en/DeviceDoc/70215C.pdf Also one for the A2D, which is an evening on its own http://ww1.microchip.com/downloads/en/DeviceDoc/70183D.pdf There are one or two things which I need clearing up. I've not yet found any code which explains down to my level of current understanding. I want to store AN0's 12-bit ADC conversions in DMA and then into external SRAM I have a print version of a project - not on-line unfortunately - which says "AN0 is continuously digitised and fed alternately into two 240 sample (480 byte) direct memory access (DMA) buffers. As each buffer becomes full, an interrupt is triggered and the handler sub-routine moves its contents into the local circular buffer, which has space for twelve sets of 240 samples (12 x 480 bytes)" My guess is that DMAxSTA and DMAxSTB have been used to set the size of the 2 DMA buffers to 240 words (the other 12 are in RAM) "DMAxSTA :- This register specifies the primary start address offset from the DMA DPSRAM base address of the data block to be transferred by DMA channel x to or from the DPSRAM. DMAxSTB This register specifies the secondary start address offset from the DMA DPSRAM base address of the data block to be transferred by DMA channel x to or from the DPSRAM." Questions - A 'block' is not 256/512 bytes (128/256 words) in length (as you might find in user RAM, eg 0-ff, 100-1ff etc) but is actually set by the user ? For example, Fig 38-5 in the pdf above shows two 16-word buffers defined In this case would Ping-Pong be used, to store data alternately in the primary or secondary buffer whilst the other is being processed ? When the buffer is full, an IRQ is generated ? Also when the transfer is complete ? Do the buffers have to be of equal size or can they be any combination up to the limit of 2k ? eg one buffer from 0x4000-0x4200 and one from 0x4200-0x47ff Only one or two buffers can be set up ? As mentioned, the "local circular buffer" is in the dsPIC's RAM, so my assumption is that, if the primary buffer was active, when 240 conversions have been stored an IRQ is generated and the active buffer becomes the secondary buffer. Whilst that is being filled, the s/w is transferring data from the primary buffer to a RAM buffer. When the secondary DMA buffer is full .... and so on TIA Joe ----- No virus found in this message. Checked by AVG - www.avg.com Version: 2016.0.7497 / Virus Database: 4540/11804 - Release Date: 03/12/16 --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .