from http://www.nxp.com/documents/application_note/AN_GOLDEN_RULES.pdf Where the gate is to be triggered by DC or unipolar pulses at zero-crossing= of the load current, negative gate current is to be preferred for the foll= owing reasons. The internal construction of the triac means that the gate i= s more remote from the main current-carrying region when operating in the 3= + quadrant. This results in: 1. Higher IGT -> higher peak IG required, 2. L= onger delay between IG and the commencement of load current flow -> longer = duration of IG required, 3. Much lower dIT/dt capability -> progressive gat= e degradation can occur when controlling loads with high initial dI/dt (e.g= .. cold incandescent lamp filaments), 4. Higher IL (also true for 1- operati= on) -> longer IG duration might be needed for very small loads when conduct= ing from the beginning of a mains half cycle to allow the load current to r= each the higher IL. Gus in Denver > On 2016m01d01, at 16:56 MST, Jason White wrote: >=20 > Hello, >=20 > I am a student, I saw this low voltage TRIAC driving circuit on the > internet and am puzzled as to why it uses a negative voltage rail? >=20 > As far as I know, TRIACS are not sensitive to the polarity of the signal > applied to the gate (with respect to MT1). Could this configuration work > with a positive supply (with respect to neutral) in all four quadrants? >=20 > --=20 > Jason White > --=20 > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist >=20 --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .