Hi Sergio, That's pretty similar to what I've sketched out in many parts. I haven't tried mine as I'm waiting on PCBs. I do have a few questions though: > // from what I've read, there is no advantage to storing > // chan_buff[][7] as BAM_buff[0] so using left shifts in the > // following code just makes things much more complicated for > // no added benefit I don't understand this comment. Do you mean using left shifts at all, or just in the init section? > void set_channel_value(unsigned char indx, unsigned char val) > { > // disable interrupts > di(); > > BAM_PORT =3D BAM_buff[bit_pos]; > > // enable interrupts > ei(); > } Why are you stuffing the output port in the set_channel_value() function? I would have thought it should only happen in the ISR? > if (bit_cnt =3D=3D 0) > { > // don't calculate bit_mask from bit_pos in the ISR as > // as variable shifts are expensive and unnecessary in > // this case > > if ((bit_mask & 0x80) =3D=3D 0) > { > bit_mask <<=3D 1; > bit_pos++; > } > else > { bit_mask =3D 1; > bit_pos =3D 0; > } > > bit_cnt =3D bit_mask; > > // I'm assuming the output pins are defined as a group at= compile time > > BAM_PORT =3D BAM_buff[bit_pos]; > } Ok, I understand that you're using a counter variable to know when to trigger the next output. I need to reread this a few more times to get a handle on the logic, but I get that you are essentially comparing a mask to a counter as you're calling the BAM ISR routine based on a regular timer interrupt. I was considering dedicating a timer to this, and loading specific values into it. It means my ISRs will be longer, but it does mean I can tune the timings a bit more. I'm not entirely sure which is the best way to go to be honest. Thanks! Josh --=20 A common mistake that people make when trying to design something completely foolproof is to underestimate the ingenuity of complete fools. -Douglas Adams --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .