Seems to me that TRISA) is a TRISTATE register bit, RA0 is the PORT
pin, and LAT0 is the LATCH bit.
 So, there is no duplicate definitions.  There is one for the TRIS bit,
one for the PORT pin, and one for the LATCH bit.

Regards,

Jim

> -------- Original Message --------
> Subject: Re: [PIC] Why are register bits accessible through more than
> one name?
> From: Jason White <whitewaterssoftwareinfo@gmail.com>
> Date: Mon, April 20, 2015 2:35 pm
> To: "Microcontroller discussion list - Public." <piclist@mit.edu>
>=20
>=20
> I'd bet the multiple names are for two things (1) consistency with
> datasheet (2) shorthand/abbreviation. It often is quite useful to make
> names a short as possible. However, abbreviations may not be
> consistent with the datasheet and may lead to ambiguity; hence the
> "proper" full length names (TRISAbits.TRISA0) are used in conjunction
> with the short ones (TRISAbits.RA0)
>=20
> On Mon, Apr 20, 2015 at 1:59 PM, Nathan House <nathanpiclist@gmail.com> w=
rote:
> > Hi,
> >
> > The main.pre file in my MPLAB X project seems to show the definitions f=
or
> > the configuration registers. One example is this:
> >
> > typedef union {
> > struct {
> > unsigned TRISA0 :1;
> > unsigned TRISA1 :1;
> > unsigned TRISA2 :1;
> > unsigned TRISA3 :1;
> > unsigned TRISA4 :1;
> > unsigned TRISA5 :1;
> > unsigned TRISA6 :1;
> > unsigned TRISA7 :1;
> > };
> > struct {
> > unsigned RA0 :1;
> > unsigned RA1 :1;
> > unsigned RA2 :1;
> > unsigned RA3 :1;
> > unsigned RA4 :1;
> > unsigned RA5 :1;
> > unsigned RA6 :1;
> > unsigned RA7 :1;
> > };
> > } TRISAbits_t;
> > extern volatile TRISAbits_t TRISAbits @ 0xF92;
> >
> > What is the point of making the same bits accessible through more than =
one
> > name?
> >
> > I.e. the following lines of code are identical, correct?
> >
> > TRISAbits.RA0 =3D 1;
> > TRISAbits.TRISA0 =3D 1;
> >
> > The LATAbits definition is even more convoluted:
> >
> > typedef union {
> > struct {
> > unsigned LATA0 :1;
> > unsigned LATA1 :1;
> > unsigned LATA2 :1;
> > unsigned LATA3 :1;
> > unsigned LATA4 :1;
> > unsigned LATA5 :1;
> > unsigned LATA6 :1;
> > unsigned LATA7 :1;
> > };
> > struct {
> > unsigned LA0 :1;
> > };
> > struct {
> > unsigned :1;
> > unsigned LA1 :1;
> > };
> > struct {
> > unsigned :2;
> > unsigned LA2 :1;
> > };
> > struct {
> > unsigned :3;
> > unsigned LA3 :1;
> > };
> > struct {
> > unsigned :4;
> > unsigned LA4 :1;
> > };
> > struct {
> > unsigned :5;
> > unsigned LA5 :1;
> > };
> > struct {
> > unsigned :6;
> > unsigned LA6 :1;
> > };
> > struct {
> > unsigned :7;
> > unsigned LA7 :1;
> > };
> > } LATAbits_t;
> > extern volatile LATAbits_t LATAbits @ 0xF89;
> >
> > I don't know why they union'd a separate struct for each of the bits
> > instead of putting them all in one struct like with TRISAbits, but the =
same
> > question applies to this as well.
> >
> > What's the point of all that redundancy?
> >
> > Thanks,
> >
> > Nate
> >
> > -----
> >
> > I'm a college student, take it easy on me ;-)
> >
> > Check out my small hobby electronics business!
> > www.foxytronics.com
> > --
> > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive
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> > http://mailman.mit.edu/mailman/listinfo/piclist
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>=20
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