Have you tried the PLL with a 16MHz can ?

In the below, from the 18F1320 d/s which shows a similar path
from the primary osc pins to the PLL, I would assume that "crystal
oscillator" means EC and that the source what comes out of the
PIC's oscillator block through the ST gate to the PLL is irrelevant

I do get what you mean about synch. Although I have a few cans
my parts drawer, the only time I ever actually used one was for a
50MHz Scenix that had to synch exactly with an 18F452. The
EC for the Scenix was divided down to drive the PIC. The s/w
of an extremely short and tight timing loop and data exchange
meshed exactly between them every single time. Very satisfying

Joe

2.5 PLL Frequency Multiplier

A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower frequency
oscillator circuit or to clock the device up to its highest
rated frequency from a crystal oscillator. This may be
useful for customers who are concerned with EMI due
to high-frequency crystals or users who require higher
clock speeds from an internal oscillator.


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