On Sun, Mar 29, 2015 at 07:08:33PM +1300, IVP wrote:
> >>http://home.clear.net.nz/pages/joecolquitt/sdhc.html
> >
> >That's very clear.  In the failure case, why didn't "do" go low
> >during "cs" high?  Are you properly detecting and handling that
> >possibility?
>=20
> No. In my defence, M'lud, you see something that apparently
> works robustly so you aren't thinking of failure detection
>=20
> The attached is a zoom-in of when it goes right
>=20
> "when DO floats when you assert CS, it means the card is busy
> programming"
>=20
> If DO is actually floating as hi-Z, and the dsPIC input is also
> floating (as an input), it sounds like I should at least add a
> pull-down, if only to eliminate a possibility

You need a way to detect when DO is floating, rather than hide it.

When floating, the signal will stay at the same level for some time.
It will swing if it is driven or has a resistor.  Does your dsPIC have
software switchable pull-down resistors?

Detecting a missing fall of DO is probably easier.  You can see in
your zoom-in when it should be.

When your code detects this, delay, then go back and try CS again.

If this delay will become critical for your application, you might
move it to after playback finishes; e.g. select the card but don't
give it a command.

That way, a read disturb reprogramming can be done at a time that
isn't critical.

--=20
James Cameron
http://quozl.linux.org.au/
--=20
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