>> The only non-data activity is when the PIC sets CS for ~700us
>> during the " > 74 clock cycles " re-init after a data time-out.=20
>=20
> Do you gate the clock at all?

10 bytes of 0xFF are sent, with clock, from the PIC's SPI module

> Or perhaps the card needs an external clock source for executing
> the code in the firmware, and if you are starving it of a clock it is
> never getting a chance to do necessary garbage collection after a
> command.

Hmmm, there's a thought. As SPI is in h/w it takes only a couple
of instructions to send 0xFF. After the block has been read I can
send plenty of dummy bytes + clock without impacting on the s/w
which follows

I'll do that now and see how it's doing in the morning. Currently
there's just one dummy byte, sent before each CMD17. ISTR
that is suggested in a pdf

> Perhaps you'd be able to prove that by scoping the current drawn
> by the card after a read command with extra clocks provided. You
> might need to scope it for thousands of reads before it needed to
> cleanup though.

So you think a current change should be detectable when it goes
into a proper idle state ?

Joe


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