On Fri, Mar 20, 2015 at 11:53:20AM +1300, IVP wrote:
> > How, and are you, powering down the card after an operation?
>=20
> Power is continuous.=20

Thanks.

> The only non-data activity is when the PIC sets CS for ~700us
> during the " > 74 clock cycles " re-init after a data time-out.=20

Do you gate the clock at all?

> Roughly the timing per second is 300ms to read/process data,
> 700ms until next read request, all with CS low apart from the
> 700us high, as above
>=20
> The only power-downs have been when I see that the read has
> failed sometime during the night. Which, of course, is the actual
> problem. "something" happens in the controller after thousands
> of reads to make further reads flakey, but it's not a fatal physical
> "something" as it can be cured. I hope today to find out what
> the minimum cure is, preferably less than a re-format / reload
>=20
> I don't recall any instruction or recommendation to have CS high
> when data isn't needed. In the pdfs I have there's very little about
> CS.

Yes, most customers use SD, so the datasheets have leaned toward it.

> I'll re-read them to see if I missed anything in the SD mode
> section that applies to but isn't included in the SPI mode section.
> Perhaps there's a counter or register that needs periodic reseting
> or refreshing=20

Or perhaps the card needs an external clock source for executing the
code in the firmware, and if you are starving it of a clock it is
never getting a chance to do necessary garbage collection after a
command.

Perhaps you'd be able to prove that by scoping the current drawn by
the card after a read command with extra clocks provided.  You might
need to scope it for thousands of reads before it needed to cleanup
though.

--=20
James Cameron
http://quozl.linux.org.au/
--=20
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