Josh Koffman gmail.com> writes: >=20 > On Thu, Mar 12, 2015 at 10:47 PM, Sergey A Dryga dryga.us> w= rote: > > Josh Koffman gmail.com> writes: > > > >> would: > >> > >> TARGETbits.PWMLSB =3D arrayofvalues[index]; > >> > >> work, or would I still need to shift to align the array value with the > >> bits I'm actually loading? My guess is that I shouldn't have to shift, > >> but I am unsure. > >> > > > > That should work. This is how Registers are defined in XC* anyway. Look= in > > the device header file for your device for examples. >=20 > Hi Sergey, >=20 > I think I asked the question poorly. I know that creating a bitfield > such that TARGETbits.PWMLSB will be valid is possible from exactly the > source you recommend - I spent a bunch of time in the processor .h > file. What I don't know is if writing to it will require a shift. > Based on some examples I've seen the answer is no. I will need to give > it a try and find out I think! >=20 > Josh Josh,=20 I used the bitfields as you describe, no need to shift. The bitfield "looks" like a normal variable, just make sure what you write in is inside of the range of the variable. For a bit field, valid values are between 0 and 2^n -1, wwhere n is number of bits. =20 Hope this helps,=20 Sergey --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .