On Thu, Mar 12, 2015 at 10:47 PM, Sergey A Dryga wrote: > Josh Koffman gmail.com> writes: > >> would: >> >> TARGETbits.PWMLSB =3D arrayofvalues[index]; >> >> work, or would I still need to shift to align the array value with the >> bits I'm actually loading? My guess is that I shouldn't have to shift, >> but I am unsure. >> > > That should work. This is how Registers are defined in XC* anyway. Look i= n > the device header file for your device for examples. Hi Sergey, I think I asked the question poorly. I know that creating a bitfield such that TARGETbits.PWMLSB will be valid is possible from exactly the source you recommend - I spent a bunch of time in the processor .h file. What I don't know is if writing to it will require a shift. Based on some examples I've seen the answer is no. I will need to give it a try and find out I think! Josh --=20 A common mistake that people make when trying to design something completely foolproof is to underestimate the ingenuity of complete fools. -Douglas Adams --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .