> Here is another spec sheet I was able to pull up. > http://dlnmh9ip6v2uc.cloudfront.net/datasheets/Components/General/SDSpec.= pdf Thanks. I have some like it, they're all a little bit different !!! There may be a glimmer of a clue in Section 4.7.2 "The period after which a time-out condition for read/write/ erase operations occurs is (card independent) either 100 times longer than the typical access times for the operations given in Table 4-6 or 100 ms (whichever is lower). The times after which a time-out condition for Write/Erase operations occur are (card independent) either 100 times longer than the typical program times for these operations given below or 250ms (whichever is lower)." Perhaps though this might refer to actively waiting for the FE token before the real data. Some data sheets say operations should be abandoned or the card rejected if there's no response after a second. Really ? A second ? This is supposed to be modern high-speed smart memory. You wouldn't put up with that in a RAM IC Harumph Basically my set-up is (lots of CMD17) ..... 0.7s to process ..... (lots of CMD17) It's during the '0.7s to process' that the card decides not to accept the next CMD17 One thing I might try is a little watchdog function that does a regular dummy read to keep the card interested Thanks Joe=20 ----- No virus found in this message. Checked by AVG - www.avg.com Version: 2015.0.5751 / Virus Database: 4299/9249 - Release Date: 03/07/15 --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .