I also agree that setting it higher than the period would result in the
pin always being high. The duty cycle comparison is done as an equals, and
if the counter never reaches this value, the pin never goes low.

The fact that it is an equals compare instead of an equal or greater than
causes fun when you're changing the duty cycle asynchronously. If you set
the duty cycle to something less than the current count, the pin will not
go low on this cycle. I haven't worked on this in a while (did light
dimmer design work years ago and used PWM to drive triacs), but tricks are
required to avoid a long cycle like this. I MAY have only updated the duty
cycle register when the period timed out, but even this would be a problem
if the duty cycle was zero since the counter may have advanced by the time
the ISR is entered. It would be nice if the comparison were a greater than
or equal instead of just equal. You could then just write to the duty
cycle register asynchronously and have it work.

Harold

>> > the PWM value you want (eg. CCPR1L =3D 50 gives 50% PWM). To be precis=
e
>> PR2
>> > =3D 99 is used here, so when CCPR1L =3D 100 it gives true 100% power (=
no
>> > glitches,
>> > PWM output always high).
>> >
>> > Thanks all.
>>
>> Can I assume anything greater than 100 for CCPR1L also gives 100% power.
>> Time to wade thru the data sheet. Should have done that in the first
>> place.
>
> Yes I would expect any value greater than 99 would keep PWM output high
> constantly.
>
>
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