> That's more like what you'd expect from around Vgs of 5.5V.
>=20
> Measure your "about 9V) at rge FET
> Actual =3D ?
>=20
> What happens when you make Vgs "about 12V"?

My other question is where do the manufacturers who spec the chip measure t=
he Vgs? Is it at the die, or at the end of the outside leads? Is voltage dr=
op across the source lead out of the chip dropping enough to 'ground bounce=
' the source pad? With a chip quoted as giving such a low Rdson one would h=
ope not.

But also what do you get in terms of chip heating if you drive it with a pr=
oper 10V instead of 'around 9V to the driver chip'? How much gate drive is =
being lost in the driver not going to the rails?

I don't have any experience driving power FETs myself (but have a couple of=
 projects I want to do with motors), but do recall warnings given here in t=
he past over how much Rdson changes with 'near enough' drive voltages.



--=20
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