On 29 October 2014 09:26, James Cameron wrote: > If the pin and power budget allows, power the external EEPROM from an > I/O pin, to ensure it meets any minimum off time spec. > > (in the product that takes most of my time, several devices needed > discharge clamps so that we could meet their power down specs. just > turning off the bus wasn't enough, we also had to pull it down.) > I've had several instances of devices that would go into fault modes and be non-resettable when (presumably) an internal node in the IC became charged by a fault condition* and the IC then became non-functional until this node had discharged - minutes to possibly tens of minutes. In one major case it came right almost instantly if power supply line was hard clamped to ground. In the case of an ISD speech IC if power was removed and restored "just right" it would enter such a mode - and it happened often enough in real world use to be annoying. I added a clamp to the 5V rail that added a substantial load when Vcc fell below say 3V and held it there until Vcc was fully zeroed. this worked well. I used 2 transistors but a reset IC may be applicable - either alone is not enough if it loses power when the bus is almost zero - it needs to be powered from its own supply (eg diode + cap) so it lives longer than the rest. If you are saving room by leaving out ecaps you will not be wanting to add power supply resetters. James' comment re powering the EEROM from a PIC pin may be desirable. Russell --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .