Yeah, the more I think about it, the less I like it.

There's no real reason to do it- my escape routes are clear enough, now
that I've moved further into the design.

Thanks for the input everyone!

MikeH

On Wed, Oct 22, 2014 at 1:23 PM, James Holland <j_holland@msn.com> wrote:

>
>
>
> > From: piclist-request@mit.edu
> > Subject: Piclist Digest, Vol 123, Issue 22
> > To: piclist@mit.edu
> > Date: Wed, 22 Oct 2014 12:34:50 -0400
> >
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> > Today's Topics:
> >
> > 1. [EE] NC pin cleverness (Mike Hord)
> > 2. Re: [EE] NC pin cleverness (Denny Esterline)
> > 3. Re: [EE] NC pin cleverness (Jean-Paul Louis)
> > 4. Re: [EE] NC pin cleverness (David VanHorn)
> > 5. Re: [EE] NC pin cleverness (Dwayne Reid)
> > 6. [OT]:: Engineers explained - Toxoplasma gondii (Brooke Clarke)
> > 7. RE: [EE] cheapest microcontroller with 10Kbps RF transciever
> > or transmitter ? (Javier Gonzalez Marcos)
> > 8. Re: [EE] NC pin cleverness (Harold Hallikainen)
> > 9. Re: [EE] cheapest microcontroller with 10Kbps RF transciever
> > or transmitter ? (V S)
> > 10. Re: [PIC] creating independent versions of a project in
> > MPLAB-X ? (Matt Rhys-Roberts)
> > 11. Re: [PIC] creating independent versions of a project in
> > MPLAB-X ? (Patrick Moody)
> > 12. RE: [EE] NC pin cleverness (Joe McCauley)
> > 13. Re: [EE] cheapest microcontroller with 10Kbps RF transciever
> > or transmitter ? (Jean-Paul Louis)
> >
> >
> > ----------------------------------------------------------------------
> >
> > From: Mike Hord <mike.hord@gmail.com>
> >
> > Give a package with NC pins does it make sense/is it anything other tha=
n
> > completely foolish to remove pads and allow mask beneath the NC pins to
> > create a route for signals to escape from under the IC?
> >
> > The IC in question is a 14mm 100-pin TQFP. There are two sections of
> > interest: one with six NC pins clustered together and one with two.
> >
> > These are *true* NC pins- the datasheet specifies them as such. Neither
> > group is at a corner; the group of two is nearly dead center and the
> group
> > of six has six more pins between it and the nearest corner.
> >
> > There's no exposed pad on this package.
> >
> > My gut tells me this is okay; this is just a general purpose developmen=
t
> > board, not something being designed for a high-stress environment. Ther=
e
> > are three things I worry about:
> > 1. Asymmetrical force during reflow: with more pads on one side reflowi=
ng
> > than the other, will that pull the part off the footprint?
> > 2. Strength after deployment: will this put more stress on the other pi=
ns
> > making them more likely to lift?
> > 3. Mask failure: will the pins rub away at the mask, possibly shorting
> the
> > trace underneath to the pin? The datasheet is mum on the pin, so it may
> be
> > used for test during manufacture, or it may just be a dead-end inside t=
he
> > package. I prefer to treat it as an unknown and *not* tie signals to it
> on
> > the blithe assumption that doing so will have no consequences.
> >
> > Are there any other things I should worry about? Any compelling reason
> not
> > to do this?
> >
> > Mike H
>
> You need to be quite certain that NC means 'not connected' and not 'no
> connect', your FAE should be able to tell you that. Personally I wouldn't
> do it, although I've known it done but in those cases the pin was a 'not
> connected' and was soldered to the trace.
> James
>
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