Josh Koffman wrote 2014-08-19 02:04:
> Hi all.
>
> ...
> I know there will be overhead as context is restored
> and saved,...

Oen of the ISR levels in the PIC18 stores some context
automaticly "on-the-fly" and that doesn't take any
additional time/overhead.

Do look in the list file what else it saves/restors, the
C compiler might generate some extra code.

Make sure that the compiler uses "fast return from interrupt".
There should be some way to control that.

Also not that 18F's only save WREG, STATUS and BSR. The new
PIA16F1xxx family automaticly saves more registers and can
today actualy have lower ISR latency then the PIC18 models.

Jan-Erik.
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