Josh Koffman <joshybear <at> gmail.com> writes:
> Aha, you are correct! I was off by a factor of 10 on my instruction
> time length. It is indeed 16MIPS, which gives an instruction clock of
> 62nS, not 6nS.

One more thing: You are programming in C, right?
Look at the .lst file for the equivalent asm code. The C compiler will have
boilerplate ISR entry and exit code as well as housekeeping in the header
of any function. Also re-entering the ISR may be subject to a 1 or 2 clock
cycle delay depending on machine state even if the IF flag is already set.



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