>             TMR1H =3D 0x0B;
>             TMR1L =3D 0xDC;
>         }
>     Doesn't that set the timer registers back to 0 and as soon as I=20
> turn the timer back on it will count to the proper value for 100mS?

The timer counts up from 0000 to FFFF and then wraps around to
0000. The instruction which sends it over FFFF to 0000 also sets
the interrupt flag, TMR1IF.

Only TMR2, the PWM timer, can be thought of as "counting to" a
particular value, in that case a hardware match. Otherwise, all the
timers count up to and through FFFF (or FF for 8-bit timers)

0x0BDC =3D 3036 decimal.
0x0000 is not only 0, but also 0xFFFF + 1, or 65536 decimal

So, in the context of count-up-to-0000, 3036 represents 65536-
3036, or -62500.

That is, 62,500 cycles are required to get the timer from 0x0BDC
up to 0000, passing through FFFF

At 5,000,000 Hz (20MGz crystal) instruction frequency, 100ms is
500,000 cycles, whch is too big to hold in the 16-bit counter of
TMR1H : L. A count of 62,500 cycles without a pre-scaler is only
12.500ms

There are two options -

(1) Use a pre-scaler. This will allow a higher count but resolution is
coarser. A pre-scaler of 1:8 will give you a count value of 500,000/
8 =3D 62,500. Which you have. Apologies if I missed you setting the
pre-scaler in any of the code you posted.

(2) Change 0x0BDC to 0x3CB0 (-50,000 decimal) and generate an
interrupt every 10ms, without using the pre-scaler

Joe
--=20
http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist
.