I am well aware of the principles of decoupling (Xilinx have some very good application notes). Calculate the resonant frequency of your capacitor with its inductance (self + trace + vias). Then arrange so that you have capacitors with resonant frequencies every half decade from the maximum clock frequency down to a few kHz. Place each capacitor under a wavelength from the pin it is decoupling. But the question I asked, and which you are failing to answer, is this: on a non ground plane board using chips with power pins at opposite corners where is the best place to put the capacitor. You say that near the Vcc and near the Ground are both wrong answers. So what is your answer? A long way from both pins? Or equidistant from both pins, which is topographically difficult? On 25 May 2014 19:41, Vasile Surducan wrote: > "The primary purpose of the decoupling capacitor is to supply the transie= nt > current needed when chip outputs switch from low to high." > > The primary purpose of any decoupling capacitor is to maintain a low > impedance in the supply point of the potential aggressor (switching for > instance). Basically you should know (by measurement) the noise spectrum = on > your board and compute the value of the decoupling capacitor for those > particular frequencies. This operation is difficult, so most people are > throwing on the board 100nF placed near the supply pins of the FPGA, > microcontrollers or whatever else. There are situations which this method > does not solve the problem. So the questions "near the Vcc" or "near the > GND" has both (in my opinion) wrong answers. You need low impedance which > should be created by generous traces thickness or better GND and VCC > planes. > > > On Sun, May 25, 2014 at 7:07 PM, Dave Tweed wrote: > > > David C Brown wrote: > > > On a board without power planes and using chips with GND and Vcc on > > > opposite corners is it best to place the decoupling capacitor nearest > the > > > GND pin or nearest the Vcc pn? > > > > Nearest the Vcc pin. > > > > The primary purpose of the decoupling capacitor is to supply the > transient > > current needed when chip outputs switch from low to high. The path for > this > > current is from the Vcc pin of the driving chip, through the high-side > > transistor, through the PCB trace to the load(s) and then to ground. So > in > > order to be most effective, the inductance (and trace length) between t= he > > capacitor and the Vcc pin needs to be as small as possible. > > > > If you don't have a ground plane, you might think you have a similar > > situation > > ond the Gnd pin with respect to high-to-low transitions; the pull-down > > current > > needs a low-impedance path, too. But the situation is not symmetrical; > the > > return path for this current is through ground, too, so you're still at > the > > mercy of the overall impedance of the ground network between the chips = in > > question. > > > > In other words, make your ground network as beefy as possible, then be > > liberal > > with the decoupling caps on the Vcc pins. > > > > -- Dave Tweed > > -- > > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > > View/change your membership options at > > http://mailman.mit.edu/mailman/listinfo/piclist > > > -- > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > --=20 __________________________________________ David C Brown 43 Bings Road Whaley Bridge High Peak Phone: 01663 733236 Derbyshire eMail: dcb.home@gmail.com SK23 7ND web: www.bings-knowle.co.uk/dcb --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .