Think pre-scaler=20 http://www.onsemi.com/pub_link/Collateral/MC12080-D.PDF On May 4, 2014, at 8:41 PM, Martin K wrote: > I want to divide an RF signal down from 100 MHz to something between 1=20 > and 5 MHz for precise counting. > The RF is essentially CW with a bit of frequency modulation. Signal=20 > power is -5 to -25 dBm which corresponds to a voltage on a 50 ohm load=20 > of 12.5mV to 125mV. >=20 > My plan is to use a very high speed comparator to capture the (AC=20 > coupled) zero crossing and put the output (LVPECL) into a couple 1:8=20 > dividers in series. The signal will probably end up going to an FPGA so=20 > LVDS or LVCMOS is desirable. >=20 > Is there a better way? >=20 > Thanks, > Martin >=20 >=20 > --=20 > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist * | __O Thomas C. Sefranek wa1rhp@comcast.net |_-\<,_ Amateur Radio Operator: WA1RHP (*)/ (*) Motorcycle mobile on 145.41 MHz. ARRL Instructor, Technical Specialist, VE Contact. http://www.harvardrepeater.org --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .