Ruben J=F6nsson wrote 2014-04-16 23:34:
>
>> A sneaky trick is to use 'tuning' to get your timing right. Instead of j=
ust
>> loaded a value into the baud rate divisor and forgetting it, you sample =
incoming
>> data bits to determine their length, and then use the results to set the=
 baud
>> rate divisor appropriately. This is very useful in a poll and respond sc=
enario.
>>
>> On one project I used it by polling the incoming data line, looking for =
a
>> transition to high (the start bit). By having the host start each messag=
e
>> with a byte of 0x0F you will see a 5 bit high time (the start bit and 4
>> one-bits of data) followed by a 5 bit low time (the high order zero bits=
 of the
>> data followed by a zero for the stop bit). I just time the 5 bit high ti=
me and
>> compute the apparent baud rate from that (which will of course be differ=
ent from
>> the real baud rate depending on the accuracy of the PICs clock). Then I =
program
>> the baud rate generator and enable the receiver. The receiver will start
>> scanning for the next start bit sometime in the middle of the 5 zero bit=
s, so it
>> will pick up the first data byte following the 0x0F trigger.
>>
>> -- Bob Ammerman
>> RAm Systems
>
> Clever.
>
> Is the baud rate divisor recalculated for every message?
>
> The internal RC clock error is temperature dependent so for a device with
> changing ambient temperature (outdoor), the baud rate divisor must be upd=
ated
> often enough to accommodate for the changing temperature.
>
> But doesn't even the one bit change for the data rate divisor result in a
> pretty large change in the baudrate?
>
> /Ruben
>

The device was not specified nor was the actual baudrate or where
on "the scale" of the baudrate register he was. With a 16-bit baud
rate register, and if you have a reasonable high nominal value for
the actual baudrate used, you will get a rather finetune effect.

In other cases, yes, it can be too large step for each LSB change.

So, as often, it depends... :-)

--=20
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