Em 15/04/2014 20:30, Matt Bennett escreveu:
> On Mon, April 14, 2014 10:04 pm, Larry Bradley wrote:
>> Just got one the other day.
>>
>> They use the internal RC oscillator. The 24F chip has a basic 8 mHz
>> clock, rated at 0.25% accuracy, I think. There is an on-board PLL for
>> the USB port that gets you higher clock rates.
> The internal FRC on the PIC24FJ64GB002 is +1%, -1.25% max, 0.25% typical.
> This usually isn't good enough for asynchronous comms- while it may work
> *most* of the time, you need to be aware that it could get out of spec.
> The rule of thumb I use is that the baud rate error could be 10x the cloc=
k
> error (since there are 10 bit-times in a standard N81 serial stream).


>From PIC16F6xxA datasheet:

"The data is received on the RB1/RX/DT pin and drives
the data recovery block. The data recovery block is
actually a high-speed shifter operating at x16 times the
baud rate, whereas the main receive serial shifter
operates at the bit rate or at FOSC."


So, the USART will detect the start-bit from 0% to 6.25% (1/16) of a bit
time after the falling edge.
If I remember it right, the USART then samples the signal three times
around the center of each bit, using a majority detector to determine
the bit value.

The sampling time must be off by less than 50% of a bit time. Because we
may be already up to 6.25% off, that leaves 43.75% to be accumulated
over the ten bits of each byte, so in theory the RX and TX clocks could
be up to 4.375% off from each other.

As one clock can be off upwards and the other off downwards, the error
must be divided by two, so the maximum allowable error would be around 2%.

The USART re-synchronizes at the beginning of each byte, so the error
will not accumulate for longer transmissions.

I have already used PICs with internal oscillators with 2% precision and
it indeed works for asynchronous UART communications.
The baud-rate doesn't matter, just the clock error.

So I would say that a clock with 0.6% stability is pretty safe.


Isaac

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