> I haven't heard of this before nor seen it in schematics.  Am curious,=20
> I'd like to build as robust designs as possible, or at least know what=20
> the additional cost/space of a zener per FET achieves.
>=20

The transistor is very sensitive for even short spikes over VGS limits.

There are devices with built in zener between g and s.


/Ruben


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Ruben J=F6nsson
AB Liros Electronic
Box 9124
200 39 Malm=F6 Sweden
www.liros.se
Tel +46 40142078
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