Hummm, Russel could you expand on the 12V zener on gate-source?  Since=20
the PIC drives it at 5V, wouldn't it be dead before the zener switches=20
on if the gate voltage spikes up to 12V?  And how much of an issue is=20
this "Cdg Miller" capacitance in the real world if not driving loads=20
like motors?  (LED strips in my case)  And would a TVS be better than a=20
general-purpose zener?

I haven't heard of this before nor seen it in schematics.  Am curious,=20
I'd like to build as robust designs as possible, or at least know what=20
the additional cost/space of a zener per FET achieves.

Thanks!
J



RussellMc wrote:
> *On 7 January 2014 14:58, Sergey Dryga <sergey@dryga.us
>
> L version is better - but better again can be had for similar $
> http://www.st.com/web/en/resource/technical/document/datasheet/CD00003405=
..pdf
>
> What Imax ever?
> What Vmax ever?
> SMD or through hole wanted.?
> What max PWM freq ever?
>
> Vgs may be > Vds with no problems.
>
> 12V zener gate-source close to FET protects against most problems from
> inductive load coupling into gate from Cdg Miller capacitance.
>
> Direct PIC to gate drive allows only low freq PWM. DC switching OK.
>
>
>               Russell
>
--=20
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