Hi - myself as well, for any chip by any company that I haven't used=20
before.  Sad but getting burned a few times (and on this one real=20
badly), well, it is necessary.

When I did the design the EUSART errata had not been published / known.=20
  I only found it because I was using the chip for something else later.

Here's another one for that chip and maybe other PICs, and is it a bug=20
or just a corner-case that one may be able to determine by intensive=20
datasheet reading: if using 16Mhz xtal, with PLL, the internal clock is=20
64Mhz.  Using the feature that puts the internal clock div 4 out on the=20
specific special pin should produce 16Mhz signal.  It makes a 16Mhz=20
triangle with peak voltage of 1.3V, not a square wave of voltage 3.3V=20
(my VCC).  As one might expect, using that as a clock for other=20
electronics yields erratic, unpredictable, layout-dependent behavior.=20
In my case I was unlucky and it worked pretty well so I did not notice=20
the problem until much later.

The reason for this?  The PIC pin drivers can't slew fast enough by far.=20
  8Mhz, the fastest signal one can generate without using the above=20
special feature, works ok, but even that was a little distorted as I recall=
..

THANKS MICROCHIP!
J


Neil wrote:
> Yes, I had seen that, but that does not apply if BRGH=3D1 and BRG16=3D1,
> which I changed to.  I've learned to read the ERRATA regularly when
> playing with Microchip parts.
>
> -Neil.
>
>
>
> Quoting Jesse Lackey <jsl-ml@celestialaudio.com>:
>
>> Note two EUSART errata for Rev A1 of the silicon: the 1/256 chance the
>> RX will miss the start bit edge, and the LSB of TX data may be corrupt.
>>
>> Yep, not even kidding, the 1/256 chance error happens depending on how
>> the baud rate is generated with BRGH and BRG16.
>>
>> See errata document DS80512F #5.1 and 5.2
>>
>> The RX error errata is the root cause of a > $10K personal loss on a
>> project, a combination of this crazy problem and an idiot client.
>> THANKS MICROCHIP!
>>
>> J
>>
--=20
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