Dear Mario I wonder if I could cross check my numbers with you. It has taken me a whir= to get back to doing this mainly because when I was initially asking it wa= s just an idea and now it is to be designed. So this is a buck regulator running from a 4 cell battery pack, so I am ass= uming I have a min voltage of 5v. When the unit is on charger, the input wi= ll be nearer 7 to 8 volts. My PNP is 500mA max, hfs of 100 min. The NPNP is 600mA with a min hfs of 10= 0. These choices were cost driven within the required specs. I get a PNP base resistor of about 700 ohms, NPN base resistor of 10K (lowe= r than the limit) and a bleed resistor of 380M to give me a bootstrap curre= nt of 100uA for a 31Khz LF-INT PIC oscillator. I could up the boot strap to= current to 700uA and start with a 1Mhz HF-INT osc.=20 When I got 380M I became doubtful of my figures and wanted to cross check w= ith you. Thanks Veronica On 2012-06-11, at 11:28 PM, Electron wrote: >=20 > Dear Veronica, >=20 >=20 > At 01.33 2012.06.12, you wrote: >> Hi all >>=20 >> Has anyone worked on a system using PWM to create a SMPSU where the=20 >> PIC/MCU supply is being generated from the PWM. I know this will need=20 >> a bootstrap mechanism and I guess that is what I am most interested. >=20 > Yes, in my buck controller the PNP switch is driven by a NPN transistor, > whose base is pulled up. The Vreg of the MPU is after this PNP high switc= h. >=20 > When power arrives, the PNP high side switch is not fully saturated but > lets nice electrons pass, thanks to the pullup on the NPN transistor that > drives the PNP base, and power leaks into the VReg and consequently the M= PU, > which is held in reset until power is good ( =3D voltage at VReg is withi= n > 98% or so of stable output voltage). >=20 > At this point the reset line is not held down anymore, the MPU gets out o= f > reset, and drives the NPN transistor base actively, 0 or 1, not tristate > anymore, being thus able to saturate the PNP transistor or switch it off > completely. >=20 > It works, and the oscilloscope shows that it even works very well. >=20 > I can give more details if you want, e.g. it's even a high tension power > input (400V). NPN collector into PNP base (through a resistor of course), > NPN base pulled up via high value resistor to PNP emitter. Not exactly, > as the pullup resistor doesn't go into NPN base but into MPU pin, and > the latter goes, through a low value resistor, into NPN base. The MPU pin > never seen high voltage, as it's clamped by the NPN base, through the low > value resistor. Currents into base, out of pin, etc.. are all much within > absolute max values, always, when MPU I/O pin is tristated, as well as wh= en > it is actively driven to 0 or 1. >=20 > One difference with your design is that I don't use PWM, but I drive the > NPN base directly via an algorithm (my MPU is doing much more than the > buck part, it's a complex/articulated system), but it doesn't change the > substance, as after reset you can enable the PWM module instead of bit > banging the I/O pin like I do. >=20 >=20 >> Thanks >=20 > I'm really very glad if I had a chance to help you. >=20 > Cheers, > Mario >=20 >=20 >>=20 >> Veronica >>=20 >>=20 >> --=20 >> http://www.piclist.com PIC/SX FAQ & list archive >> View/change your membership options at >> http://mailman.mit.edu/mailman/listinfo/piclist >=20 > --=20 > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .