Well I'm not sure what I did, but I managed to get it to work with SSPIF at 8MHz. Thanks for the info though guys. //Relevant code: void main(void) { OSCCON =3D 0b01111110; //8MHz ANSEL =3D 0b00000000; //All digital inputs TRISA =3D 0b11111000; //porta TRISB =3D 0b11111111; //portb PORTA =3D 0b00000000; PORTB =3D 0b00000000; INTCON =3D 0b00000000; //Disable all interrupts INTCONbits.GIE =3D 1; //Global interrupt INTCONbits.TMR0IE =3D 0; //Timer0 interrupt OPTION_REG =3D 0b00000111;//Set the TMR0 rate to 1:256 (trigger after 256k ticks) unsigned char i =3D 0; for(i =3D 0; i < 2; i++) { RA0 =3D 1; RA1 =3D 1; delay_ms(25); RA0 =3D 0; RA1 =3D 0; delay_ms(25); } TRISB1 =3D 1; TRISB4 =3D 1; SSPCON =3D 0x36; SSPADD =3D ADDR; SSPSTAT =3D 0; GIE =3D 1; PEIE =3D 1; SSPIE =3D 1; SSPIF =3D 0; SSPEN =3D 1; while(1); } void interrupt isr(void) { static unsigned char rxbufcnt =3D 0; static unsigned char rxbuf[6]; if ((SSPIF) && (SSPIE)) { SSPIE =3D 0; //Disable the interrupt SSPIF =3D 0; //Clear the interrupt flag if (SSPSTATbits.S) { if ((!SSPSTATbits.R_nW) && (BF)) { //State 1: S=3D1, R_nW=3D0, D_nA=3D0, BF=3D1 //Master write, last byte was an address if (!SSPSTATbits.D_nA) { rxbufcnt =3D 0; SSPBUF; } //State 2: S=3D1, R_nW=3D0, D_nA=3D1, BF=3D1 //Master write, last byte was data else { rxbuf[rxbufcnt] =3D SSPBUF; rxbufcnt++; SSPBUF; } } else if (SSPSTATbits.R_nW) { //State 3: S=3D1, R_nW=3D1, D_nA=3D0 //Master read, last byte was address if (!SSPSTATbits.D_nA) { //May not be needed SSPBUF; //do whatever checks or processing needed with rxbuf[] //Send data, I'm sending a dummy 0xee value SSPBUF =3D 0xee; //Queue the value to send CKP =3D 1; //Release clock (from stretch) } //State 4: S=3D1, R_nW=3D1, D_nA=3D1, BF=3D0 //Master read, last byte was data else if (!SSPSTATbits.BF) { SSPBUF; } } //State 5: S=3D1, D_nA=3D1, BF=3D0, CKP=3D1 //Master NACK else if ((!SSPSTATbits.D_nA) && (SSPSTATbits.BF) && (SSPCONbits.CKP)) { SSPBUF; } } SSPIE =3D 1; } } On Sun, Feb 10, 2013 at 1:42 AM, IVP wrote: >> how long ago was that BF flag problem caught? > > It'll be a few years now - 5 ? > > They do seem to have trouble with module flags. I've found a flag > issue as recently as last year, in the 33F SPI module > > My PIC was choking on SDHC card data and, despite much > correspondence with Microchip Support, wasn't solved or > even acknowledged by them. Which is why, after many similar > instances, I just don't bother with them any more. The guys I > seem to get are worse than useless in that they waste my time, > often by twisting the question to suit *their* test results (eg > trying my code on a completely different processor) and then > close the bloody ticket as "Resolved", leading me to write a > proper paper letter to the tech's trainers at Microchip HQ > > Just out of interest, this test is for an SPI byte received > > btss SPI1STAT,#SPIRBF > bra $-2 > > However, it doesn't work without this immediately before > > bclr SPI1STAT,#SPIROV > > This is undocumented and because I don't think the tech I was > talking to believes me, it will probably stay undocumented > > Joe > -- > http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist --=20 http://www.piclist.com/techref/piclist PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .