alan smith <micro_eng2@yahoo.com> wrote:
> I'm looking for a reversed battery and overload protection device (or cir=
cuit) that has something more than a 40A capacity, similar to the  ST Micro=
 RBO40-40G
> but higher in capacity.
> I'd prefer a single part like this due to board layout constraints.

Voltage?
Postscript_first: You said overload. I now see IC originally specd
covers overvoltage.
More complete spec may help.
Overvoltage is easier than overcurrent and allows eg 1.4 milliOhm
Rdson part for eg 14W dissipation at 100A.

Overcurrent protection can e done at no more dissipation at 100A than
ST parts provides at 40A.

BOM: 2 x MOSFETS, 1 x jellybean transistor. some Rs.

1.  The arrangement in 2. below does not handle overload (except destructiv=
ely).
Handles reverse polarity "perfectly"

Single FET cannot do both tasks due to forward biased diode when used
for protection. Two FETS in series, polarity opposed plus minimal glue

Polarity + Overvoltage:
Two FETS, one jellybean transistor and 2 resistors (2 more resistors
if above about 20V).

Polarity + Overcurrent:
2 x transistors + a few R's would allow a full solution at any current.
Rdson of protection FET probably best >=3D 0.8/Itrip.
eg for 100A trip =3D 0.8/100 -> >=3D 8 milliOhms.
Easily enough done.
Power in MOSFET at 0.8V, 100A =3D 80W!
ST part has Vmax =3D 1.9V at 40 A =3D 76W, so no worse than 40A solution.

Reverse protection FET can have as low an Rdson as desired.

Lovely part
http://www.irf.com/product-info/datasheets/data/irls3034-7ppbf.pdf
1.4 mOhm, N Channel
0.4 C/W Rth_j-c
240 A bond wire limited :-)
270 A package limited
380A silicon limited
$US3.42/1000 Digikey
________

No slouch
STV200N 55F3
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DAT=
ASHEET/CD00188712.pdf
(Obsolete, they say).

2. Reversed battery can be done with a single MOSFET of correct Vgsth.
 eg for high side
P Channel (d & s reversed to normal)
Source to V+
Drain to load
(Load =3D Drain to ground)
Gate to ground or divide V+-Ground.

Vgate arranged to be adequately high when Vin is correctly applied.

This will have only MOSFET leakage when reverse, + divider current if
a gate divider is used.

MOSFET gate voltage can be arranged to limit Imax, but only at the
cost of excess power dissipation in the FET, for a small while :-)

> ST Micro RBO40-40G

Datasheet link always a good idea

http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DAT=
ASHEET/CD00001320.pdf



              Russell
--=20
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