On Sat, Jan 05, 2013 at 03:54:34PM +0000, Rupert Swarbrick wrote:
> Hi,
>=20
> Can anyone point out what I'm doing wrong with the following (minimal)
> code? I can't seem to convince my 16F1824 to output anything on RA5 (pin
> 2 in the DIP package).
>=20
> I presume that I've configured the pin to be doing something else, but
> I've pored over the datasheet for ages and can't work out what I've
> missed. Changing the BSF line to "bsf LATA, 4" switches on pin 3 as
> expected. Does anyone have any ideas?

Nothing sticks out. Have you tried a chip swap yet?

I agree with Jan-Eric that using the codes for the Configs is a good idea.

Also I would suggest changing the gotos to branches, so that PCLATH can be
removed from the equation. With the enhanced parts, I very rarely use goto
anymore.

Finally is anything connected to RA5? There may be a load dragging the
output buffer.

Just my two cents.

BAJ

>=20
> Many thanks,
>=20
> Rupert
>=20
>=20
>=20
> Assembly file below:
>=20
> #include <p16f1824.inc>
>=20
>     ERRORLEVEL -302 ; Banksel warning.
>=20
>     ; Config options
>     ; FCMEN 0     (Enables internal oscillator on external death,
>     ;              but we're using internal anyway)
>     ; IESO 0      (Two-speed start-up. Not used)
>     ; -CLKOUTEN 1 (Disable CLKOUT and use the pin for IO)
>     ; BOREN 00    (Disable Brown-out reset)
>     ; -CPD 1      (Data code protection)
>     ; -CP 1       (Code protection)
>     ; MCLRE 1     (Use MCLR pin as MCLR: needs a pull-up resistor!)
>     ; -PWRTE 1    (Don't enable the power-up timer)
>     ; WDTE 01     (Watchdog timer software-controlled)
>     ; FOSC 100    (Internal oscillator)
>       __config _CONFIG1,b'00100111101100'
>=20
>     ; LVP 1       (Enable low-voltage programming)
>     ; -DEBUG 0    (ICSPCLK, ICSPDAT used for debugger)
>     ; '1'         unused
>     ; BORV 1      (Disabled anyway)
>     ; STVREN 1    (Stack under/overflow reset)
>     ; PLLEN 0     (PLL not used)
>     ; '111111'    unused/reserved
>     ; '11'        (Disable write protection)
>       __config _CONFIG2,b'10111011111111'
>=20
>       UDATA
>=20
> .RST code h'0000'
>     goto setup
>=20
> .ISR code h'0004'
>     retfie
>=20
> setup:
>     banksel ANSELA
>     clrf    ANSELA
>     banksel TRISA
>     clrf    TRISA
>     banksel LATA
>     clrf    LATA
>     goto    main
>=20
> main:
>     clrwdt
>=20
>     banksel LATA
>     bsf     LATA, 5
>=20
>     goto    main
>=20
>       END


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--=20
Byron A. Jeff
Chair: Department of Computer Science and Information Technology
College of Information and Mathematical Sciences
Clayton State University
http://faculty.clayton.edu/bjeff
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