Michael Rigby-Jones wrote:
>> Michael Rigby-Jones wrote:
>>    =20
>>> I'm looking at the specs of the 12 bit DACs built into an STM32 micro, =
and
>>>      =20
>> the (very poor) differential non-linearity specs are as follows:
>>    =20
>>> 10 Bit Mode +-0.5 LSB
>>> 12 Bit Mode +- 2 LSB
>>>
>>> Now the features list in the datasheet suggests that the DACs are
>>>      =20
>> monotonic, but I am having some difficult understanding how monotonicity
>> can be guaranteed with a DNL of +-2 LSB's.  Could someone enlighten me
>> please?
>>    =20
>>> Cheers
>>>
>>> Miek
>>>
>>>      =20
>
>  =20
>> -----Original Message-----
>> From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] On Behalf
>> Of Kerry Wentworth
>> Sent: 12 November 2012 15:04
>> To: Microcontroller discussion list - Public.
>> Subject: Re: [EE] DAC Monotonicity vs DNL
>>
>> Hi Michael,
>>
>> If you have a 12 bit DAC with 4.095V full scale output, then setting it =
to a code
>> of 1000 would give you a (nominal) output of 1.000V.  2 bits of non-line=
arity
>> means you will actually get between 0.998 and 1.002V out.  Monotonicity
>> guarantees that a code of 999 will output a voltage less than a code of =
1000,
>> and a code of 1001 will output a voltage greater than a code of 1000.
>> So you might get:
>> 999 - .997V
>> 1000 - .998V
>> 1001 - 1.000V
>>
>> or
>> 999 - 1.001V
>> 1000 - 1.002V
>> 1001 - 1.003V
>>
>> Kerry
>>    =20
>
> This is not how I understand Differential Non-Linearity is defined.  In t=
he above examples you are actually showing a DNL of 0 LSBs since the voltag=
e difference between successive codes is exactly 1 LSB in each case, even t=
hough there is an offset error.
>
> To use your example:
>
> 1000 gives a nominal voltage of 1.000v
> 1001 gives a nominal voltage of 1.001v
> 1001 - 1 LSBs gives a voltage of 1.000v  (Still Monotonic with DNL  of 1 =
LSB )
> 1001 - 2 LSBs gives a voltage of 0.999v  (Not Monotonic with DNL of 2 LSB=
 )
>
> Regards
>
> Mike
>  =20
You are correct, my mistake.  I suspect that the DNL will show up mainly=20
at transistions such as 0x7FF to 0x800.  If the MSB does not produce a=20
voltage of 1 LSB more than the sum of all of the lower bits, it will=20
show up as DNL.  If it does not produce a voltage greater than the sum=20
of all of the lower bits, it will lack monotonicity.  If it produces a=20
voltage between the sum of all of the lower bits and the sum of all of=20
the lower bits plus 3 LSB, then it will have the specs you quoted.=20
(Assuming it is true of all bits)

Sorry for the confusion (mine)

Kerry
--=20
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist
.