I've generally put them "as close as possible" and had no problems. But, that's not very specific. I did some analysis on bypass capacitors for a couple Altera FPGAs. They have a nice spreadsheet that takes a LOT into consideration. It takes the ripple current on the pin and the allowed ripple voltage, then determines the maximum impedance allowed. It then looks at the impedance of the capacitor, the impedance of traces to the capacitors, impedance of vias, parallel capacity of power planes, and internal bypassing for very high frequencies. It's very thorough. But, I haven't seen anything like that for a PIC. Harold --=20 FCC Rules Updated Daily at http://www.hallikainen.com - Advertising opportunities available! Not sent from an iPhone. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .