Hello all...

As mentioned in my mail, I submitted the strange behaviour I
experienced with mplab x to the Microchip bug list, and got as answer:

<paraphrased>
We believe that this is due to the read-modify-write
nature of the bsf instructions. You should keep an image and update the
image
</paraphrased> (...and closed the bug)

If I understand the RMW behaviour, then the possible problems are due
to either capacitive (or other) loading of the outputs, or having some
internal peripheral enabled which could cause the same loading.

Is there any way this could explain my problem? I even tried the
'image' method to update port A, and the mplab X simulator _still_
doesn't show any change to the port A output.

Am I really that far off my game? Could someone try to run this code and ch=
eck
if they have the same problems? (MPLAB X is Linux 64bit version 1.30 here)
Gpsim and the actual hardware say I'm right...

John

BSF Code:
                processor pic16f874=20
                include   P16F874.INC
                                  =20
                org     0
                                =20
                goto    start   =20
                            =20
		org     4

start
		banksel TRISA
		movlw   b'00000111'
		movwf   ADCON1    =20
                             =20
		movlw   b'00111001'
		movwf   TRISA     =20
                            =20
		clrf    TRISB
                            =20
		banksel PORTA
loop
		bsf     PORTA,1
		bsf     PORTA,2

		bcf     PORTA,1
		bcf     PORTA,2
                goto    loop=20

                end

Direct modification code (no RMW): ---------------------------

                processor	pic16f874=20
                include 	P16F874.INC
                                  =20
                org             0
                                =20
                goto    start   =20
                            =20
                org             4

start
		banksel TRISA
		movlw   b'00000111'
                movwf   ADCON1    =20

		movlw   b'00111001'	; Bits 1 & 2 as outputs
		movwf   TRISA     =20

		clrf    TRISB

		banksel PORTA
loop
		movlw   2             =20
		movwf   PORTA
		movlw   6
		movwf   PORTA
		movlw   4
		movwf   PORTA
		movlw   0   =20
		movwf   PORTA

		goto    loop=20

		end
--=20
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