I made the RC osc work on 16f57. It requires a minimum of 18k as R to work =
at all. I chose 22k for reliability. With 18k and 47pF at 5V and 30C it ran=
 at about 100kHz (at CLK2 =3D=3D CLK1/4). I would really like to not thank =
mchip for not wasting the 3 minutes it takes to put in some decent limits f=
or the R and the C. The 18k minimum R is significantly different from previ=
ously listed minimums (about 10 times higher than the one implied for 16c57=
, the last chip of this class for which I found data in its datasheet).

With lead frame capacitance given as ~5pF for DIP I infer that the RC osc c=
an go about 8 times faster than with 47pF external cap, namely about 800kHz=
 maximum core clock (6.4MHz at CLK1).

-- Peter

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