At 08:05 AM 15/08/2012, you wrote:
>I'm out of my element when it comes to practical PLL circuits.
>I'm considering using a PLL to create a 25MHz signal which should be
>phase locked to an input reference 20MHz signal. Do you know of some
>ICs that I could consider for this purpose?
>Most of the ones that I have seen quote significantly higher frequency
>values. Usually higher than 200 MHz.

TI 74HC4046/7046 will run at 25MHz (5V supply), but it's close to
the top. You have to be a bit careful with the '4046 series- they can vary
a LOT from manufacturer to manufacturer.

There are also clock distribution etc. chips that should do the whole thing
(programmable dividers etc). CDE906, and there are many others. Most tend t=
o
be very power-hungry, IME, if that's a concern for you.

A Pericom PI6C4511 set to x2.5 followed by a divide-by-two (eg. SN74LVC1G17=
5)
from 50MHz down to 25MHz might be the simplest solution (no programming
required, and relatively reasonable current draw from either 3.3V or 5V).
The divide-by-two ensures 50:50 duty cycle too, if that's a concern.

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the rewar=
d"
speff@interlog.com             Info for manufacturers: http://www.trexon.co=
m
Embedded software/hardware/analog  Info for designers:  http://www.speff.co=
m



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