M.L. wrote: > I'm out of my element when it comes to practical PLL circuits. > I'm considering using a PLL to create a 25MHz signal which should be > phase locked to an input reference 20MHz signal. Do you know of some > ICs that I could consider for this purpose? > Most of the ones that I have seen quote significantly higher frequency > values. Usually higher than 200 MHz. My usual approach for this sort of thing is to use a VCXO module for the=20 oscillator, and control it using a small CPLD, or a portion of a larger FPG= A if there's one in the system anyway. The CPLD contains the dividers and phase comparator, and drives the VCXO wi= th a PWM (or delta-sigma) digial signal through a simple RC low-pass filter. One advantage of this approach is that it gives you a lot of flexibility wi= th regard to the VCXO behavior when out of lock, or when making the transition into or out of lock -- sometimes I've had some very specific requirements i= n these areas. -- Dave Tweed --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .