On Sun, 2012-06-10 at 21:01 -0400, V G wrote: > I'm pretty sure that most Xilinx FPGAs use external memory to load their > configuration, as is with Altera FPGAs. The CPLDs, however, have on-chip > flash. True, there are other FPGA manus that do flash for PGM memory. > In terms of other people downloading your code, if they wanted to do that= , > they would find a way regardless of where it is stored. I think your best > bet for protection is some kind of encryption. This unfortunately doesn't make sense. The FPGA bit stream is very specific to the FPGA in question. You can't just encrypt it yourself any qay you want, otherwise the FPGA reading those bits won't understand a bloody thing. You COULD find a way to perhaps encrypt say static data, put it in an EEPROM and them have the FPGA decrypt it, but that wouldn't be that much harder to crack for someone really good if the regular bitstream is in the clear. The good news however is bitstream encryption is a pretty standard feature in most FPGA families. A quick google for the FPGA the op is interested in will tell them whether or not it's an option for them. TTYL --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .