Em 12/6/2012 10:18, Bob Ammerman escreveu:
>>> As for the technical (or historical ?) reasons behind FPGA volatility
>>> vs. CPLD non-volatility, I have no idea - that would be enlightening if
>>> somebody in the know could comment on it.
>>>
>>> Hope this helps.
>>>
>>> Regards,
>>>
>>> Pete Restall
>>> --
>>>
>> Pete, they're RAM based devices last I checked, which would explain the
>> volatility and inability to put flash on the same chip inexpensively.
> I have often heard this. If it is difficult to mix RAM and Flash on the s=
ame=20
> chip how does Microchip do it?
>
> -- Bob Ammerman
> RAm Systems


Atmel, Freescale, Texas, etc. also.

Years ago, it was difficult to mix analog with digital, bipolar with
CMOS, RAM with FLASH, etc with etc.
Nowadays, the manufacturing processes are much improved.

Nearly every manufacturer have MCUs with large RAM and FLASH on the same
die.
Perhaps they can do better without the mixing, but it is economically
feasible now.


Isaac

--=20
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist
.