>> As for the technical (or historical ?) reasons behind FPGA volatility >> vs. CPLD non-volatility, I have no idea - that would be enlightening if >> somebody in the know could comment on it. >> >> Hope this helps. >> >> Regards, >> >> Pete Restall >> -- >> > > Pete, they're RAM based devices last I checked, which would explain the > volatility and inability to put flash on the same chip inexpensively. I have often heard this. If it is difficult to mix RAM and Flash on the sam= e=20 chip how does Microchip do it? -- Bob Ammerman RAm Systems --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .