This is how I mentally picture a capacitor: When current goes into one leg it goes out of the other. When it does the=20 voltage over the dielectric also rises more and more until it prohibits any= =20 more current flowing (causing the capacitor charge/discharge curve). No=20 electrons are actually moved from one side to the other though (electrostat= ic=20 repelling forces of charges of equal polarity). =20 You can compare a capacitor in an electric circuit to a barrel with a flexi= ble=20 water tight membrane in the center (dividing the barrel in two parts) in a= =20 water flowing circuit. When water pushes in on one side, the membrane flexe= s at=20 the same time as water is pushed out on the other side. The membrane flexes= as=20 much as the water pressure allows. To high pressure and the membrane breake= s=20 causing a short. It is also the membrane that holds the energy in the barre= l,=20 allowing it to push back water when the pressure is lowered. Also, the more= =20 flexed the membrane is, the more work is needed to flex it even more. This model also makes it easier to understand why a high frequency can pass= =20 easier through the capacitor than a low frequency (where the extreme is DC)= .. /Ruben =20 > Capacitors: >=20 > I'm trying to (fully) understand the principle of capacitor reactance and > high pass filters. I'm having trouble forming a mental picture of how a > capacitor in series with a signal blocks DC and has the lowest impedance > for the highest frequency signals on a voltage and charge-on-the-plate > level. I can understand how a capacitor tied to ground acts as a buffer a= nd > smoothes out high frequencies by averaging the voltage. But I don't reall= y get > how the reverse is true for a capacitor in series with a signal. I can se= e how > it blocks DC after it is fully charged. >=20 > 1. How does a capacitor in series work to block a DC signal, but pass a > high frequency signal? > 2. If you apply a voltage to a capacitor in series (keeping in mind that = it > takes time for the voltage from the power source to rise), I understand t= hat the > current before the capacitor is NON-zero. But what about the current AFTE= R (on > the other side) of the capacitor? Is it zero or non-zero (considering tha= t a > capacitor is just two parallel plates)? >=20 >=20 > LC circuits: >=20 > 1. Consider a parallel LC circuit where the bottom is tied to ground and > the top is tied to a mixed-frequency signal source. I understand that the > parallel LC circuit will shunt all frequencies to ground other than those > around its resonant frequency. After the signal source is removed, the > circuit will eventually lose its energy. How do I make an oscillator out = of such > an LC circuit that self-starts (that is, I can simulate in LTSPICE which = doesn't > take into account external noise coming into an oscillator circuit, which= is > required for some oscillator designs)? I've looked at LC oscillator circu= it > types like the Hartley oscillator, but I don't see how this can self star= t in > theory under ideal conditions. -- http://www.piclist.com PIC/SX FAQ & lis= t > archive View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist >=20 >=20 > ----- > No virus found in this message. > Checked by AVG - www.avg.com > Version: 2012.0.2178 / Virus Database: 2433/5048 - Release Date: 06/05/12 >=20 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D Ruben J=F6nsson AB Liros Electronic Box 9124, 200 39 Malm=F6, Sweden TEL INT +46 40142078 FAX INT +46 40947388 ruben@pp.sbbs.se =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .