Hi,
I have a IC which, in the datasheet, is said to need a powerup rise time no=
t
slower than 100uS in order to initialize correctly. Effectively it doesn't =
work
if the power ramps up slow, and there's no reset input, power must be disco=
nnected
in order to attempt a new successfull turn on.

How would you ensure fast powerup rise time? The power turns on / ramps up =
very
slowly, and I can't help it.

I am currently investigating two options:

1) a PNP/NPN or PMOS/NPN pass circuit at the output, and using a voltage re=
gulator
with error output (LP2951): when the error is signaled, no power is passed =
to the IC.
I would prefer to power the problematic IC directly via the error output, b=
ut it sinks
too much current (even 50 mA), so the PNP/NPN power switch is necessary, bu=
t it will
introduce a voltage drop, which is gonna cause errors (it's an analogue IC)=
..

2) using a voltage supervisor (e.g. NCP302HSN40T1G) BEFORE the voltage regu=
lator, to
control the shutdown pin of the latter (a LP2951). Seems like a good idea, =
however
the NCP302HSN40T1G has a 10V voltage input limit which ruins the 30V needed=
 and
offered by the LP2951.

How would you handle this problem?

And, regarding 1) can you suggest me a cheap and small logic level PMOS tra=
nsistor?
It needs to pass (or not) +3.3V with minimal voltage drop even at 100mA pea=
k current.
For "logic level" I mean that with the source at +3.3V and the gate at grou=
nd, it
should ~fully conduct.

Thanks a lot for any help.

Mario

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