I think you're right Harold. Sorry for the confusion. I should have read th=
e datasheet better.

-Andries

-----Oorspronkelijk bericht-----
Van: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] Namens Harold=
 Hallikainen
Verzonden: 01 May 2012 14:39
Aan: Microcontroller discussion list - Public.
Onderwerp: RE: [PIC] ADC interface to hiZ source


>> That will give you a value with an error towards whatever level is=20
>> used for the "discharge" (instead). I do not see how that is better=20
>> then a value that is somehowe baised on interference from another channe=
l.
>>
>> If you have two channels with, say, 3.0V and 3.1V on each, and you
>> *do* have problems with aquisision time, you will get a larger error=20
>> if you always discharge to 0V between each channel switch.
>>
>> Besides, I do not remember reading about that discharge for each=20
>> conversion either. :-)
>>
>> Jan-Erik.
>
> The discharge phase is not implemented on the smaller PICs (well,=20
> maybe on some newer devices, I don't know them all).
>
> For example, the PIC18F4550 *does* have such a discharge phase (see=20
> datasheet DS39632D-page 267):
>
>   21.7  Discharge
>
>   The discharge phase is used to initialize the value of
>   the capacitor array. The array is discharged before
>   every sample. This feature helps to optimize the
>   unity-gain amplifier as the circuit always needs to
>   charge the capacitor array, rather than charge/discharge
>   based on previous measurement values.
>
>
> -Andries

Is "the array" the input sample capacitor? I think the ADC uses an array of=
 capacitors in a charge balance mechanism. It is, I think, like an R2R ADC,=
 but is instead C2C. I don't think the capacitor being discharged is the in=
put sample/hold capacitor.

Harold


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