>> That will give you a value with an error towards whatever level is used >> for the "discharge" (instead). I do not see how that is better then a >> value that is somehowe baised on interference from another channel. >> >> If you have two channels with, say, 3.0V and 3.1V on each, and you >> *do* have problems with aquisision time, you will get a larger error if >> you always discharge to 0V between each channel switch. >> >> Besides, I do not remember reading about that discharge for each >> conversion either. :-) >> >> Jan-Erik. > > The discharge phase is not implemented on the smaller PICs (well, maybe o= n > some newer devices, I don't know them all). > > For example, the PIC18F4550 *does* have such a discharge phase (see > datasheet DS39632D-page 267): > > 21.7 Discharge > > The discharge phase is used to initialize the value of > the capacitor array. The array is discharged before > every sample. This feature helps to optimize the > unity-gain amplifier as the circuit always needs to > charge the capacitor array, rather than charge/discharge > based on previous measurement values. > > > -Andries Is "the array" the input sample capacitor? I think the ADC uses an array of capacitors in a charge balance mechanism. It is, I think, like an R2R ADC, but is instead C2C. I don't think the capacitor being discharged is the input sample/hold capacitor. Harold --=20 FCC Rules Updated Daily at http://www.hallikainen.com - Advertising opportunities available! Not sent from an iPhone. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .