I'm sitting here working on a board, and I can't figure out something- it seems like tradition that you don't put your soldermask over a via- that's the default in Eagle* and how it has worked out in most layouts I've done. Is there good reason for this with modern PCB fab equipment? I realize that an un-masked via makes for an easy rework/test point. I can also see that I may not want to put mask over a hole (where there isn't board to cover), but the silkscreen also seems to be left off where there isn't mask, and I want to make sure I don't mess with my silkscreen (if I need to get at the via, I'd rather scrape off the mask/silkscreen). A friend got burned by poor plating a long time ago, and on his protos, insists on filling the vias with solder- just in case the plating was poor. Valid, but I haven't seen a bad via on my boards in years- if the vias are that bad, there probably are other problems. A google search came up with the possibility of trapping chemicals under the mask in a drill hole, but that sounds like a more fundamental issue with the manufacturing process. Regards, Matt * You can adjust this property in Eagle Layout under 'DRC' -> 'Masks' Matt Bennett Just outside of Austin, TX 30.51,-97.91 The views I express are my own, not that of my employer, a large multinational corporation that you are familiar with. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .