Indeed I simplified the explanation. I think that there are bits to
control how many positions must be empty in the FIFO before the UART
starts generating interrupts again.
That is, the UART generates interrupts until the FIFO is full, and
starts generating again after a certain number of bytes were transmitted..


Isaac


Em 11/12/2011 17:44, Chris Roper escreveu:
> Like issac said,
>
> I knew my explanation was confusing, but I couldn't see why, FIFO is the
> key word I missed, along with the important fact of being ready to accept=
 a
> byte, not 4 bytes as I  originally said.
>
> On 11 December 2011 21:29, Isaac Marino Bavaresco <
> isaacbavaresco@yahoo.com.br> wrote:
>
>> The UART will keep setting the interrupt flag until the transmit FIFO is
>> full. Then it will generate another interrupt only after one byte is
>> transmitted and the FIFO can accept one more byte.
>>
>>
>> Isaac
>>
>>
>>

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