Matt Pobursky wrote:
> Since the capture register is only 16 bits, at some lower frequency you'l=
l
> have to start counting CCP source TIMER rollovers too and include them in
> the elapsed time between events calculation.
>
> It's easy enough to calculate what frequency this will occur at -- 1/(655=
36
> x CCP clock source period).
>

To stay platform independent, I think, we should take the counters as
24 or 32 bit arranged in software; Even for 18F line, the arrangment
seems not to be a problem at the frequencies (200Hz - 60Khz)
--=20
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