>>Now that I know how to transfer to the computer at high speeds (via
>>FT232H), and have some solid FPGA groundwork down, I'm trying to make an
>>analog signal analyzer with a parallel interface ADC. I'm looking to=20
>>sample
>>signals no more then 1MHz (and at most up to 5V), so I thought I'd choose=
=20
>>a
>>part of at least 5MSPS.
>>
>>http://www.linear.com/product/LTC1405
>>
>>This chip looks good. Not too expensive, 12 bit, 5MSPS, simple parallel
>>interface. But it also says 100MHz full power bandwidth sampling. I don't
>>understand, if it can sample at 5MSPS, how can it sample a 100MHz signal?
>
> How? The tacq for that ADC is 50ns. Why would you want to? You can sample
> a 100MHz signal at 5MSPS and still be above The Shannon-Nyquist if the=20
> signal
> is band-limited.


--=20
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