On Sat, 2011-10-29 at 21:20 -0400, V G wrote:
> Yes, I know that some chips are capable of only lower speed grades. I'm
> pretty sure (but I'll check again) that my chip is capable of -5 speed
> grade.

One thing I wanted to mention before but forgot: always compile for the
speed grade that your part is. Although this doesn't seem to make sense,
it is true: a design compiled for a slower grade part MIGHT not work at
all in a faster grade part.

This fact once caught me, I was seeing a problem with one board. After
looking I noticed that the problem board had a FASTER grade part. On a
whim I re-targeted the faster part and recompiled; problem disappeared.=20

No idea why this was, and I've never had an FAE tell me outright this is
the case, but it's something I keep in the back of my mind now.

> But the problem was solved. I didn't give it a  clock period constraint a=
nd
> used a clock frequency much higher than what was possible with my design.=
 I
> followed the suggestions in the output of the timing report and everythin=
g
> works well now.

Glad to hear it!

TTYL

--=20
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