On Sat, Oct 29, 2011 at 12:40 PM, Herbert Graf <hkgraf@gmail.com> wrote:

> You're right, a "normal" IO is in no way capable of switching at
> 3.125GHz using fabric.


Which makes me wonder how desktop CPUs switch at over 3GHz internally, and
2GHz(1GHz?) on the front side bus (which is IO).


> To support high speed serial protocols like PCIE, SATA, Ethernet, etc,
> FPGAs for years have had high speed serial-parallel transceivers. Xilinx
> called theirs RocketIO (I think they are deprecating that name, I hear
> it less and less in conversation). There have been several generations,
> the V6 parts have some IOs that support serial speeds of I think
> 10-12Gbps.
>
> Again, how the fabric deals with such fantastic speeds is through
> parallelism. If you look up the GTP transceiver you'll see that it's
> high speed side is single bit differential, while it's low side speed is
> likely 10 or 20 bits wide (I'm guessing, it could be other widths
> depending how you configure the block in coregen).
>

Thank you, that's exactly what I was wondering.
--=20
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