At 22.50 2011.10.20, you wrote:
>Em 20/10/2011 17:58, Sergey Dryga escreveu:
>> M.L. <m <at> lkeng.net> writes:
>>
>>>>> For example :
>>>>> __asm__ volatile(=E2=80=9Cdisi #0x3FFF=E2=80=9D); // disable temporar=
ily all=20
>interrupts
>>>> or, in C:
>>>> INTCONbits.GIE =3D 0; //disable interrupts
>>>>
>>> Those are not equivalent.
>>>
>> Why?  They both disable global interrupts, right?  Maybe this is a proof=
 that
>> one needs to know assembly?
>>
>
>
>1) "DISI" is a PIC24 and dsPIC instruction;
>2) PIC24 and dsPICs don't have an "INTCON" register (they have INTCON1
>and INTCON2) nor a "GIE" bit.
>The closer to a "GIE" bit is the IPL0-IPL2 field in the "SR" register
>(there's an IPL3 bit also in the "CORCON" register). When the field has
>value 7 or greater all the user interrupts are disabled;
>3) "DISI" disables the interrupts for a number of instruction cycles
>only (16384 in that case).

CPU cycles is a concept alien to C programmers, and it is so by design ;)

>
>Isaac
>
>--=20
>http://www.piclist.com PIC/SX FAQ & list archive
>View/change your membership options at
>http://mailman.mit.edu/mailman/listinfo/piclist

--=20
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist
.